Texas Instruments CD74HC107EE4 Flip Flops
IC FF JK TYPE DUAL 1BIT 14DIP
Same model may have multiple batches, images only for reference.
Manufacturer
Part Number (MPN)
CD74HC107EE4
Series
Base Model
Detailed Description
Dual negative-edge-triggered J-K flip-flops with reset, operating at up to 35MHz. This CMOS logic IC features two independent J-K flip-flop circuits, each with a single-ended input and non-inverting output. Designed for through-hole mounting in a 14-PDIP package, it offers a supply voltage range of 2V to 6V and a wide operating temperature range from -55°C to 125°C. Key specifications include a propagation delay of 170ns and a turn-on delay time of 14ns, with output currents of ±5.2mA.
Package
PDIP
Lifecycle Status
Active
RoHS State
RoHS Compliant
Datasheet
CD74HC107EE4 Datasheet
Quick Jump:
Technical Specifications
Texas Instruments CD74HC107EE4 Flip Flops technical specifications.
General
Series
74HC
RoHS
Yes
Package / Case
14-DIP
Mounting Type
Through Hole
Operating Temperature
-55°C ~ 125°C (TA)
Supply Voltage
2V ~ 6V
Lifecycle Status
Active
Package
PDIP
Clock Edge Trigger Type
Negative Edge
Contact Plating
Gold
Alternate Parts Comparison (CD74HC107EE4 vs CD74HC4051MM96EP vs CD74HC08QM96Q1 vs CD74HC125QM96G4Q1)
Side-by-side technical parameter comparison of related primary models in this product family.
| This Part | Alternate Parts | Alternate Parts | Alternate Parts | |
|---|---|---|---|---|
| Series | 74HC | -- | -- | -- |
| Mounting Type | Through Hole | -- | -- | -- |
| Operating Temperature | -55°C ~ 125°C (TA) | -- | -- | -- |
| Supply Voltage | 2V ~ 6V | -- | -- | -- |
| Frequency | 35MHz | -- | -- | -- |
| RoHS | Yes | -- | -- | -- |
| Clock Edge Trigger Type | Negative Edge | -- | -- | -- |
| Contact Plating | Gold | -- | -- | -- |
| High Level Output Current | -5.2mA | -- | -- | -- |
| Input Type | SINGLE-ENDED | -- | -- | -- |
| Lead Free | Lead Free | -- | -- | -- |
| Logic Function | Flip-Flop, JK-Type | -- | -- | -- |
| Action |
Texas Instruments CD74HC107EE4 Flip Flops Overview
Dual negative-edge-triggered J-K flip-flops with reset, operating at up to 35MHz. This CMOS logic IC features two independent J-K flip-flop circuits, each with a single-ended input and non-inverting output. Designed for through-hole mounting in a 14-PDIP package, it offers a supply voltage range of 2V to 6V and a wide operating temperature range from -55°C to 125°C.
Key specifications include a propagation delay of 170ns and a turn-on delay time of 14ns, with output currents of ±5.2mA.
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